silicon protection arrays ?2009 littelfuse, inc 10 application guide 10/100 ethernet considerations: 10/100 relates to the data rate in mbps (i.e. 10mbps and 100mbps) for 10 base-t, data is transmitted over 2 utp (unshielded twisted pairs) using a 10mhz clock for 100base-tx, data is transmitted over 2 utp using a 125mhz clock for these data rates the parasitic capacitance needs to be taken into account to preserve signal integrity the 4 data lines below ( tx+/- and rx+/- ) are being protected against intra-building (i.e. 100a, t p =8/20us) lightning transients by a two stage protection scheme application schematic: recommended spa devices: ordering number esd level (contact) lightning (t p =8/20 s) i/o capacitance # of channels v rwm packaging sp03-xbtg 30kv 150a 16pf 2 3.3v,6v soic-8 SP3050-04HTG 20kv 10a 2.4pf 4 6v sot23-6 ethernet phy outside world case gnd tx- rx+ rx- j1 j8 sp03 ( x2 ) tx+ *package is shown as transparent rj-45 co nn ector case gnd sp3050 nc
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